CMRI-Bus-Interface

RS422/485 driver for CMRI-Net

Pin-header interface

Daughter board for interfacing with CMRI Bus traffic using MRCS ‘duino example code. Uses an optional onboard 555 to generate TX/RX enable based on processor I/O direction

CMRI-Bus-Interface Version 2.1

Not built

Not released

Pin-header interface

Daughter board for interfacing with CMRI Bus traffic using MRCS ‘duino example code. Uses an optional onboard 555 to generate TX/RX enable based on processor I/O direction

Bot Silk

Board

Top Silk

UNPUBLISHED

CMRI-Bus-Interface Version 2.0

Not built

Note: Experimental design, not released

Pin-header interface

Daughter board for interfacing with CMRI Bus traffic using MRCS ‘duino example code. Uses an optional onboard 555 to generate TX/RX enable based on processor I/O direction

Bot Silk

Board

Top Silk

UNPUBLISHED

CMRI-Bus-Interface Version 1.0

Not built

Note: Experimental design, not released

IO4 interface

Daughter board for interfacing with CMRI Bus traffic using MRCS ‘duino example code. Uses an optional onboard 555 to generate TX/RX enable based on processor I/O direction

Bot Silk

Board

Top Silk

UNPUBLISHED

This technical documentation is licensed under the CERN Open Hardware Licence v1.2

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